On the fab floor, a 0.3°C swing during photoresist bake is enough to scrap a whole lot—before etch even sees the wafer. Thermal budgets don’t negotiate. We built a CE-approved semiconductor heater for exactly that reality: it holds wafer-level uniformity at ±0.1°C across the full bake window, so critical dimensions follow the recipe, not the drift. What matters, technically The heater pairs a stable, low-thermal-mass element with a quartz thermal path and an NIR-optimized response. That gives you fast, repeatable ramps and rock-solid setpoints for soft bake and hard bake. Temperature stays in spec even when the door opens and during batch changes. It’s built for cleanroom Class 1–100: materials and surfaces are chosen to keep particle generation down, and the design avoids outgassing that can contaminate photoresist. The control architecture is tuned for semiconductor discipline—setpoint to wafer, not to the heater housing—so it keeps running, shift after shift. Why it works in lithography The bake step is where adhesion, solvent removal, and film stress get set. With ±0.1°C uniformity, you cut line-width variability, tighten overlay, and reduce rework. Fast stabilization shortens changeover, so you get more uptime without compromising bake profiles. Targeted heating and efficient insulation keep energy use in line, lowering cost per wafer while holding thermal repeatability tight across shifts. CE compliance means the system meets auditable safety and EMC requirements for production deployment. Things to keep straight This heater drops into standard semiconductor bake plates and cleanroom interfaces, but confirm footprint and mounting tolerances against your tool. For full performance, the thermal stack—plate, sensor placement, and wafer support—needs to match the specified emissivity and contact conditions. Commission it the right way: run a metrology map across the wafer plane, then lock the profile into the SPC window.